YOLO end-to-end example, CircularTensor hardening, CPU backend, ThreadFusion, multi-GPU routing - #2

…ce tests

REAL BUG found while hardening: the generated ct_update/ct_snapshot baked
self.width/self.height as C literals, but the compile-cache signature only
contains dtype/batch/order/layout/chain — NOT the size. Two CircularTensors
with the same signature and different sizes would cache-hit the first .so
and run with the WRONG hardcoded grid and snapshot byte count (out-of-bounds
reads/writes; surfaced as 'invalid argument' in an unrelated test). Fix:
PyCT now stores w/h at ct_create time and the kernel launch + snapshot use
them at runtime, matching the values-vs-types rule everywhere else.
CODEGEN_VERSION 6->7.

New CircularTensor tests (21 checks total now):
- t_race_audit: proves the divergent update is race-free by construction --
  the temp slot written by seq1 is never among the slots read by seq2, for
  both orders and every rotation index.
- t_temp_data_consistency: temp/data double-buffer coherence across 3 full
  rotation wraps, verified plane-by-plane via ct_snapshot_temp.
- t_generate_source_no_compile: new generate_source() API (codegen without
  compiling) checked for all structural pieces.
- t_size_not_in_signature_regression: the exact bug scenario.

CI: the codegen-compile-check job now also compiles CircularTensor sources
(packed/planar, newest/oldest, with preproc chains) via generate_source().

…n tests

Closes out the pending-work checklist:

- CPU backend (target='cpu'): generates a plain C++ TU running
  TransformDPP<ParArch::CPU> on MemType::Host pointers, compiled by
  clang++ (g++ rejects Stream_<ParArch::CPU>'s ctor spelling), numpy
  arrays in/out. 5 tests incl. CPU==GPU cross-validation.

- ThreadFusion (thread_fusion=True): emits TransformDPP<GPU_NVIDIA,
  TF::ENABLED>. Auto-falls back to scalar for shapes whose row bytes are
  not 16-aligned: external tight-pitch pointers fault on vectorized loads
  (found via real 'misaligned address' on a 251-wide image). 5 tests:
  exactness vs scalar baseline, odd widths, uchar3, distinct cache keys.

- Multi-GPU: DeviceBuffer/CircularTensor take device=N (per-device primary
  contexts retained via the driver API); compose pipelines follow the
  input's device (torch cuda:N / cupy / DeviceBuffer); DLPack device id
  propagated. Honest caveat: single-GPU box, exercised on device 0 with
  clean errors for absent devices.

- Torch integration suite (torch 2.12+cu130, real GPU): zero-copy both
  directions (mutation-visibility proven), external torch streams, out=,
  uchar3 HWC->CHW vs torch reference, CircularTensor->torch window, batch
  HF from torch list. Found+fixed _alloc_out shape bug for TensorSplit
  chains (was returning HWC-shaped tensor for planar CHW output).

- fk::Equal / Tuple-input ops: documented as structural limit (needs a
  multi-source Read producing Tuple<A,B>; upstream feature candidate).

- spikes/repro_divergent_sum_z.cu: reproducer behind upstream issue #250
  (Divergent Executor launches sum-of-z planes; compute-sanitizer verified
  OOB + canary corruption).

Full matrix: 13 suites x 2 backends (nvcc+clang) + cpu + torch, all green.